DocumentCode :
1889750
Title :
A 105dB-gain 500MHz-bandwidth 0.1Ω-output-impedance amplifier for an amplitude modulator in 65nm CMOS
Author :
Chul Kim ; Chang-seok Chae ; Young-Sub Yuk ; Yi-Gyeong Kim ; Jong-kee Kwon ; Gyu-Hyeong Cho
Author_Institution :
KAIST, Daejeon, South Korea
fYear :
2010
fDate :
7-11 Feb. 2010
Firstpage :
88
Lastpage :
89
Abstract :
A 500 MHz -3 dB bandwidth linear amplifier in 65 nm CMOS at 1.2 V supply is presented for an amplitude modulator in a polar transmitter. The design uses a gain-boosting scheme for 105 dB DC gain at an 8 ¿ load and a buffered switching Class-AB bias scheme. It has 0.1 ¿ output impedance at 5 MHz and can drive 60 mA peak current. The chip efficiency is 83.5% and area is 1.35 mm2.
Keywords :
CMOS analogue integrated circuits; amplifiers; amplitude modulation; modulators; radio transmitters; CMOS; amplitude modulator; current 65 mA; frequency 5 MHz; frequency 500 MHz; gain 105 dB; gain-boosting scheme; impedance amplifier; linear amplifier; polar transmitter; size 65 nm; voltage 1.2 V; Amplitude modulation; Bandwidth; Circuits; Energy consumption; Impedance; MOSFETs; Mirrors; Negative feedback; Power amplifiers; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0193-6530
Print_ISBN :
978-1-4244-6033-5
Type :
conf
DOI :
10.1109/ISSCC.2010.5434037
Filename :
5434037
Link To Document :
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