Title :
An efficient framework of using various decomposition methods to synthesize LUT networks and its evaluation
Author :
Yamashita, Shigeru ; Sawada, Hiroshi ; Nagoya, Akira
Author_Institution :
NTT Commun. Sci. Labs., Kyoto, Japan
Abstract :
We present an efficient framework for synthesizing look-up table (LUT) networks. Some of the existing LUT network synthesis methods are based on functional (Boolean) decompositions. Our method also uses functional decompositions, but we try to use various decomposition methods, which include algebraic decompositions. Therefore, this method can be thought of as a general framework for synthesizing LUT networks by integrating various decomposition methods. We use a cost database file which is a unique characteristic in our method. We also present comparisons between our method and some well-known LUT network synthesis methods, and evaluate the final results after placement and routing. Although our method is rather heuristic in nature, the experimental results are encouraging.
Keywords :
binary decision diagrams; combinational switching; field programmable gate arrays; logic CAD; network routing; table lookup; FPGA; LUT networks; algebraic decompositions; combinational logic functions; cost database file; decomposition methods; functional decompositions; look-up table; network synthesis methods; placement; routing; Costs; Databases; Field programmable gate arrays; Laboratories; Libraries; Logic functions; Network synthesis; Optimization methods; Programmable logic arrays; Table lookup;
Conference_Titel :
Design Automation Conference, 2000. Proceedings of the ASP-DAC 2000. Asia and South Pacific
Conference_Location :
Yokohama, Japan
Print_ISBN :
0-7803-5973-9
DOI :
10.1109/ASPDAC.2000.835106