DocumentCode :
1890085
Title :
Design and maintenance of physical processing for reconfigurable radio systems
Author :
Lund, David ; Honary, Bahram
Author_Institution :
HW Commun. Ltd, Lancaster, UK
Volume :
1
fYear :
2001
fDate :
37135
Abstract :
The concept of the reconfigurable radio system requires new methods for the design and maintenance of the signal processing hardware and its flexible software and configurations. Existing methods used for hardware and software codesign need modification to take into account increased redundancy and how it may be used dynamically throughout the lifetime of the hardware platform. This paper describes the design flow used to build a reconfigurable processing demonstrator which is primarily intended to reconfigure between DCS1800 and UTRA air interfaces. This demonstrator forms part of the EU funded CAST (configurable radio with advance software technology) project
Keywords :
cellular radio; digital signal processing chips; field programmable gate arrays; hardware-software codesign; logic design; reconfigurable architectures; signal processing equipment; CAST project; DCS1800 air interface; DSP; FPGA; UTRA air interface; design flow; digital signal processors; field programmable gate arrays; flexible configurations; flexible software; hardware software codesign; object oriented methodology; physical processing; reconfigurable processing demonstrator; reconfigurable radio systems; signal processing hardware; Communication system control; Control systems; Digital communication; Driver circuits; Field programmable gate arrays; Hardware; Java; Logic devices; Resource management; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Personal, Indoor and Mobile Radio Communications, 2001 12th IEEE International Symposium on
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-7244-1
Type :
conf
DOI :
10.1109/PIMRC.2001.965499
Filename :
965499
Link To Document :
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