DocumentCode :
1890336
Title :
Reconfigurable computing: its concept and a practical embodiment using newly developed dynamically reconfigurable logic (DRL) LSI
Author :
Yamashina, Masakazu ; Motomura, Masato
Author_Institution :
Silicon Syst. Res. Labs., NEC Corp., Kanagawa, Japan
fYear :
2000
fDate :
9-9 June 2000
Firstpage :
329
Lastpage :
332
Abstract :
This paper first outlines a broad range of reconfigurable computing research activities from a perspective of system LSI designs. Then, the paper focuses onto dynamically reconfigurable logic (DRL) LSI, a prototype chip that we developed to evaluate the reconfigurable computing concept. Through its ability to exchange hardware contexts quickly, this chip can accelerate media/communication applications with customized hardware configurations, yet maintaining scalability towards varying application sizes.
Keywords :
integrated logic circuits; large scale integration; reconfigurable architectures; communication applications; customized hardware configurations; dynamically reconfigurable logic LSI; media applications; reconfigurable computing IP core; scalability; system LSI designs; varying application sizes; Acceleration; Computer interfaces; Hardware; Laboratories; Large scale integration; National electric code; Program processors; Prototypes; Reconfigurable logic; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2000. Proceedings of the ASP-DAC 2000. Asia and South Pacific
Conference_Location :
Yokohama, Japan
Print_ISBN :
0-7803-5973-9
Type :
conf
DOI :
10.1109/ASPDAC.2000.835119
Filename :
835119
Link To Document :
بازگشت