DocumentCode :
1890528
Title :
Improved path clustering for adaptive path-delay testing
Author :
Chan, Tuck-Boon ; Kahng, Andrew B.
Author_Institution :
ECE Dept., UC San Diego, La Jolla, CA, USA
fYear :
2012
fDate :
19-21 March 2012
Firstpage :
13
Lastpage :
20
Abstract :
Adaptive path-delay testing is a testing methodology that reduces redundant test patterns based on the measured process condition of a die under test (DUT). To improve testing efficiency, process conditions are clustered into a limited number of clusters, each of which has a corresponding set of test patterns. The test pattern set of a cluster must include all potential timing-critical paths of all process conditions in the cluster. Hence, high-quality clustering is needed to minimize redundant test paths. In this paper, we propose a new clustering heuristic to minimize the expected number of redundant test paths in adaptive path-delay testing. Our experimental results on randomly generated testcases show that the proposed clustering heuristic can reduce the expected number of test paths by up to 40% compared to the previous Greedy clustering algorithm of Uezono et al. [5]. To address unique attributes of an industrial testcase obtained from the authors of [5], we integrate the dynamic-programming restricted-partitioning technique of [1], which improves the expected number of test paths by up to 5% compared to the Greedy algorithm.
Keywords :
automatic test pattern generation; dynamic programming; greedy algorithms; integrated circuit testing; random processes; DUT; Greedy clustering algorithm; adaptive path-delay testing; clustering heuristic; die under test; dynamic-programming restricted-partitioning technique; greedy algorithm; high-quality clustering; industrial testcase; measured process condition; path clustering; process conditions; randomly generated testcases; redundant test paths; redundant test patterns; test pattern set; testing efficiency; testing methodology; timing-critical paths; Clustering algorithms; Equations; Frequency modulation; Greedy algorithms; Mathematical model; Merging; Testing; adaptive testing; clustering; partitioning;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Quality Electronic Design (ISQED), 2012 13th International Symposium on
Conference_Location :
Santa Clara, CA
ISSN :
1948-3287
Print_ISBN :
978-1-4673-1034-5
Type :
conf
DOI :
10.1109/ISQED.2012.6187468
Filename :
6187468
Link To Document :
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