Single fault reliability analysis in FPGA implemented circuits

Author

Jahanirad, Hadi ; Mohammadi, Karim ; Attarsharghi, Pejman

Author_Institution

Coll. of Electr. Eng., Iran Univ. of Sci. & Technol., Tehran, Iran

fYear

2012

fDate

19-21 March 2012

Firstpage

49

Lastpage

56

Abstract

Reliability analysis in FPGA implementation of logic circuits is an important issue in designing fault tolerant systems for faulty environments. In this paper an analytical method is developed for analyzing such systems. This method is based on signal probability propagation of faults from the location of appearance to final outputs of circuit. Single fault model is used for the faults occurred in routes and LUTs. In addition reconvergent fan-outs are handled using 16 correlation coefficients propagation approach. Experimental results show a good agreement between this method and Monte Carlo method for reliability analysis of MCNC benchmarks.

Keywords

Monte Carlo methods; fault diagnosis; fault tolerance; field programmable gate arrays; logic circuits; probability; FPGA implementation; FPGA implemented circuit; MCNC benchmark; Monte Carlo method; correlation coefficient propagation; fault reliability analysis; fault tolerant system; faulty environment; logic circuit; reconvergent fan-outs; signal probability propagation; single fault model; Circuit faults; Correlation; Field programmable gate arrays; Logic gates; Reliability; Switches; Wires; Correlation Coefficient; FPGA; LUT; Reliability; SEU; Signal Probability; Single Fault;

fLanguage

English

Publisher

ieee

Conference_Titel

Quality Electronic Design (ISQED), 2012 13th International Symposium on

Conference_Location

Santa Clara, CA

ISSN

1948-3287

Print_ISBN

978-1-4673-1034-5

Type

conf

DOI

10.1109/ISQED.2012.6187473

Filename

6187473