• DocumentCode
    1890800
  • Title

    A 48-Core IA-32 message-passing processor with DVFS in 45nm CMOS

  • Author

    Howard, John ; Dighe, S. ; Hoskote, Yatin ; Vangal, Sriram ; Finan, D. ; Ruhl, G. ; Jenkins, Devon ; Wilson, H. ; Borkar, N. ; Schrom, Gerhard ; Pailet, F. ; Jain, Sonal ; Jacob, Tony ; Yada, S. ; Marella, S. ; Salihundam, P. ; Erraguntla, V. ; Konow, M.

  • Author_Institution
    Intel, Hillsboro, OR, USA
  • fYear
    2010
  • fDate
    7-11 Feb. 2010
  • Firstpage
    108
  • Lastpage
    109
  • Abstract
    A 567 mm2 processor on 45 nm CMOS integrates 48 IA-32 cores and 4 DDR3 channels in a 6×4 2D-mesh network. Cores communicate through message passing using 384 KB of on-die shared memory. Fine-grain power management takes advantage of 8 voltage and 28 frequency islands to allow independent DVFS of cores and mesh. As performance scales, the processor dissipates between 25 W and 125 W.
  • Keywords
    message passing; microprocessor chips; power aware computing; shared memory systems; 2D mesh network; 48-core IA-32 message-passing processor; CMOS; DVFS; fine-grain power management; message passing; on-die shared memory; size 45 nm; CMOS process;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    0193-6530
  • Print_ISBN
    978-1-4244-6033-5
  • Type

    conf

  • DOI
    10.1109/ISSCC.2010.5434077
  • Filename
    5434077
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1890800