DocumentCode
1891164
Title
Thermal modeling of nanodevices
Author
Vasileska, D. ; Raleva, K. ; Goodnick, S.M. ; Aksamija, Z. ; Knezevic, I.
Author_Institution
Dept. of ECEE, Arizona State Univ. Tempe, Tempe, AZ, USA
fYear
2010
fDate
26-29 Oct. 2010
Firstpage
1
Lastpage
5
Abstract
In this paper we summarize 6 years of work on modeling self-heating effects in nano-scale devices at Arizona State University (ASU). We first describe the key features of the electro-thermal Monte Carlo device simulator (the two-dimensional and the three-dimensional version of the tool) and then we present series of representative simulation results that clearly illustrate the importance of self-heating in larger nanoscale devices made in silicon on insulator technology (SOI). Our simulation results also show that in the smallest devices considered the heat is in the contacts, not in the active channel region of the device. Therefore, integrated circuits get hotter due to larger density of devices but the device performance is only slightly degraded at the smallest device size. This is because of two factors: pronounced velocity overshoot effect and smaller thermal resistance of the buried oxide layer. Efficient removal of heat from the metal contacts is still an unsolved problem and can lead to a variety of non-desirable effects, including electromigration. We propose ways how heat can be effectively removed from the device by using silicon on diamond and silicon on A1N technologies.
Keywords
Monte Carlo methods; electromigration; integrated circuit reliability; nanoelectronics; silicon-on-insulator; thermal resistance; buried oxide layer; electro-thermal Monte Carlo device simulator; electromigration; integrated circuits; metal contacts; nanoscale devices; self-heating effects; silicon-on-diamond; silicon-on-insulator; thermal modeling; thermal resistance; velocity overshoot effect; Boundary conditions; Conductivity; Lattices; Phonons; Silicon; Temperature dependence; Thermal conductivity; Self-heating effects; fully-depleted SOI devices; silicon on diamond and silicon on AIN;
fLanguage
English
Publisher
ieee
Conference_Titel
Computational Electronics (IWCE), 2010 14th International Workshop on
Conference_Location
Pisa
Print_ISBN
978-1-4244-9383-8
Type
conf
DOI
10.1109/IWCE.2010.5677916
Filename
5677916
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