• DocumentCode
    1891286
  • Title

    A new efficient method for substrate-aware device-level placement

  • Author

    Lin, C. ; Leenaerts, D.M.W.

  • Author_Institution
    Dept. of Electr. Eng., Eindhoven Univ. of Technol., Netherlands
  • fYear
    2000
  • fDate
    9-9 June 2000
  • Firstpage
    533
  • Lastpage
    536
  • Abstract
    The performance of high-frequency mixed-signal and analog designs heavily relies on the actual layout of the circuit components on device level. Substrate coupling has been recognized as one of the major physical design bottlenecks in this field. To deal with this problem in an efficient way, a new technique is proposed based on the sequence pair structure and corner stitching. Performance gain is guaranteed at the cost of O(M) run-time complexity, which is optimal. Simulations with randomly generated problem instances show that practical run-times are indeed linear in the size of the problem instance, thus enabling other design optimization algorithms to incorporate the proposed method without increasing run-time complexity.
  • Keywords
    analogue integrated circuits; circuit layout CAD; circuit optimisation; computational complexity; integrated circuit layout; integrated circuit modelling; mixed analogue-digital integrated circuits; simulated annealing; EnS algorithm; HF analog designs; HF mixed-signal designs; IC layout; design optimization algorithm; run-time complexity; sequence pair structure; substrate coupling; substrate-aware device-level placement; Analog circuits; Cost function; Coupling circuits; Design optimization; Frequency; Minimization; Performance gain; Runtime; Signal design; Simulated annealing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2000. Proceedings of the ASP-DAC 2000. Asia and South Pacific
  • Conference_Location
    Yokohama, Japan
  • Print_ISBN
    0-7803-5973-9
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2000.835158
  • Filename
    835158