DocumentCode :
1891419
Title :
Design challenges for 0.1 um and beyond
Author :
Sakurai, Takayasu
Author_Institution :
Center for Collaborative Res., Tokyo Univ., Japan
fYear :
2000
fDate :
9-9 June 2000
Firstpage :
553
Lastpage :
558
Abstract :
If we look into the scaling law carefully, we find that three crises can be stringent in realizing LSI´s for 0.1 um and beyond: namely power crisis, interconnection crisis, and complexity crisis. This paper describes these crises and possible solutions to cope with the problems.
Keywords :
integrated circuit design; large scale integration; 0.1 micron; deep-submicron LSI design; scaling law; Collaboration; Costs; Delay effects; Energy consumption; Integrated circuit interconnections; Large scale integration; Leakage current; Power system interconnection; Publishing; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2000. Proceedings of the ASP-DAC 2000. Asia and South Pacific
Conference_Location :
Yokohama, Japan
Print_ISBN :
0-7803-5973-9
Type :
conf
DOI :
10.1109/ASPDAC.2000.835162
Filename :
835162
Link To Document :
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