Advanced design of high-linearity analog predistortion Doherty amplifiers using spectrum analysis for WCDMA applications

This paper represents the advanced design methods of a high-linearity analog predistortion Doherty power amplifier (DPA) using spectrum analysis for WCDMA applications. For the analog predistortion linearization, the DPA utilizes the bandwidth reduction of the error signal, linear AM/AM characteristic without any abrupt change, and memory effect reduction. To verify our methods, the asymmetrical Doherty amplifier using a RFHIC RT440 40-W push-pull type GaN HEMT and the analog predistorter with a diode-based error generator and three-branch nonlinear paths are implemented at 2.14 GHz. From the measured one-carrier WCDMA results at an average output power of 34 dBm (11-dB back-off power from the saturation power), the analog predistortion DPA with a drain bias voltage of carrier cell of 34V shows an ACLR of -54 dBc at ±2.5 offsets with a power-added efficiency of 18.9%.