DocumentCode :
1891978
Title :
A systems approach to gate CD control: metrology, throughput, and OEE
Author :
Monahan, Kevin M. ; MacNaughton, Craig ; Ng, Waiman ; Quattrini, Richard
Author_Institution :
KLA-Tencor Corp., San Jose, CA, USA
fYear :
1997
fDate :
6-8 Oct 1997
Abstract :
The 0.13 μm semiconductor manufacturing generation, shipping as early as 2001, will have transistor gate structures as small as 100 nm, creating a demand for 10 nm gate linewidth control and for measurement precision on the order of 1 nm. In this work, we show that the prospects are excellent for using CDSEM technology to control gate linewidths with 1 nm precision, very high effective throughput, and 75% overall equipment effectiveness in 300 mm factories
Keywords :
integrated circuit measurement; integrated circuit yield; lithography; size control; size measurement; statistical process control; 0.13 micron; 10 nm; 100 nm; ANOVA; CDSEM technology; OEE; equipment effectiveness; gate critical dimension control; gate linewidth control; measurement precision; process stability; random error reduction; spatial uniformity; speed binning; statistical metrology; systems approach; transistor gate structures; very high effective throughput; Circuit synthesis; Control systems; Inspection; Metrology; Production facilities; Resists; Semiconductor device manufacture; Stability; Throughput; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Manufacturing Conference Proceedings, 1997 IEEE International Symposium on
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-3752-2
Type :
conf
DOI :
10.1109/ISSM.1997.664510
Filename :
664510
Link To Document :
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