An in-process evaluation technique for detection of buried oxide leakage on SOI materials

The authors present a method for investigating buried oxide defects after the initial patterning and etching of the superficial silicon layer on a SOI (silicon-on-insulator) wafer. This method is based on the principle of charged-induced scanning electron microscope evaluation and testing (CISMET). In this method, an imaging electron microscope is used to charge the silicon structures isolated on the buried oxide. Silicon structures which are connected to the substrate remain unchanged. The resulting image identifies the shorted structures as highly visible elements within a field composed of the isolated structures whose brightness in the electron microscope image is greatly reduced by the charging. The authors present examples of the use of the CISMET process on test structures and on SRAM circuit components, and discuss the possible applications of this technique to in-process determination of buried oxide defects on SOI circuit structures