CMOS mixed signal fingerprint sensing and parallel processing architecture

A CMOS fingerprint sensing and parallel processing architecture is implemented on two chips. The first captures the fingerprint and transfers the pattern to the second. The sensors on the first chip are implemented based on a capacitive technique. The parallel processing algorithms include gap removal, spur removal, and thinning. In addition, a novel processing architecture has been implemented using vMOS transistors. Parallel operation of the processing units reduces power dissipation. Both chips use a standard CMOS process, with double poly layers and two metal layers.