DocumentCode
1892349
Title
Partitioning and dynamic mapping evaluation for energy consumption minimization on NoC-based MPSoC
Author
Antunes, Eduardo ; Soares, Matheus ; Aguiar, Alexandra ; Johann, F.S. ; Sartori, Marcos ; Hessel, Fabiano ; Marcon, César
fYear
2012
fDate
19-21 March 2012
Firstpage
451
Lastpage
457
Abstract
Software complexity has increased considerably over recent years, needing special target architectures as NoC-based MPSoCs to fulfill the heavy storage, communication and computation requirements. The design of these systems requires efficient methodologies aggregating partitioning and mapping. In these sense, this paper explores partitioning and mapping influence on energy consumption of homogeneous NoC-Based MPSoC. In addition, it compares two strategies to achieve efficient dynamic mappings: one that map tasks directly onto processors and another one that applies a previous static task-partitioning and uses this information to choose the dynamic task mapping. Experiments with various synthetic and four embedded applications show the efficiency of the second strategy that minimizes an average of 23.5% on energy consumption.
Keywords
multiprocessing systems; network-on-chip; power aware computing; NoC-based MPSoC; dynamic mapping evaluation; dynamic task mapping; energy consumption minimization; software complexity; static task-partitioning; Computer architecture; Energy consumption; Equations; Mathematical model; Partitioning algorithms; Program processors; Tiles; MPSoC; Mapping; NoC; Partitioning;
fLanguage
English
Publisher
ieee
Conference_Titel
Quality Electronic Design (ISQED), 2012 13th International Symposium on
Conference_Location
Santa Clara, CA
ISSN
1948-3287
Print_ISBN
978-1-4673-1034-5
Type
conf
DOI
10.1109/ISQED.2012.6187532
Filename
6187532
Link To Document