• DocumentCode
    1892951
  • Title

    Comparison between power gating and DVFS from the viewpoint of energy efficiency

  • Author

    Inoue, Atsuki

  • Author_Institution
    Fujitsu Labs. Ltd., Kawasaki, Japan
  • fYear
    2012
  • fDate
    19-21 March 2012
  • Firstpage
    601
  • Lastpage
    608
  • Abstract
    To increase the energy efficiency of modern LSIs, supply voltage control techniques (power gating and dynamic voltage frequency scaling) have been widely used and the energy efficiency of fine grain temporal controls in both cases have been discussed. In this paper, we applied dead time constraint, compared the energy efficiencies and formulated the boundary condition that power gating is more energy efficient than DVFS. The formulation is applied to discuss the future trend of energy efficiency using ITRS roadmap and it was found that DVFS would be still effective with high-performance technology, however, it will not be effective with low-operating-power technology.
  • Keywords
    energy conservation; large scale integration; low-power electronics; voltage control; DVFS; ITRS roadmap; LSIs; boundary condition formulation; dead time constraint application; dynamic voltage frequency scaling; energy efficiency; fine grain temporal control; high-performance technology; low-operating-power technology; power gating; supply voltage control technique; Energy consumption; Energy efficiency; Energy loss; Logic gates; Power supplies; Transistors; Voltage control; DIBL; DVFS; Energy gain; ITRS; Power gating;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Quality Electronic Design (ISQED), 2012 13th International Symposium on
  • Conference_Location
    Santa Clara, CA
  • ISSN
    1948-3287
  • Print_ISBN
    978-1-4673-1034-5
  • Type

    conf

  • DOI
    10.1109/ISQED.2012.6187555
  • Filename
    6187555