Title :
HP Precision: a spectrum architecture
Author_Institution :
Hewlett-Packard, Cupertino, CA, USA
Abstract :
The author discusses the Hewlett-Packard Precision architecture, which was designed as a common architecture for HP computer systems. It has a RISC (reduced-instruction-set computer)-like execution model, with features for code compaction and execution time reduction for frequent instruction sequences. In addition, it has features for making the architecture extendible, for enhancing its longevity, and for supporting different operating environments. The author describes some aspects of the Precision processor architecture, its goals, how it addresses the spectrum of general-purpose use information, processing needs, and some architectural design tradeoffs
Keywords :
computer architecture; HP Precision; Hewlett-Packard; RISC-like execution model; architectural design tradeoffs; code compaction; common architecture; computer architecture; execution time reduction; instruction sequences; processing needs; spectrum; Application software; Compaction; Computer architecture; Costs; Decoding; Guidelines; Hardware; Pipelines; Registers; Scalability;
Conference_Titel :
System Sciences, 1989. Vol.I: Architecture Track, Proceedings of the Twenty-Second Annual Hawaii International Conference on
Conference_Location :
Kailua-Kona, HI
Print_ISBN :
0-8186-1911-2
DOI :
10.1109/HICSS.1989.47164
