DocumentCode :
189397
Title :
CMOS-NEM relay based on tungsten VIA layer
Author :
Riverola, Martin ; Vidal-Alvarez, Gabriel ; Torres, Francesc ; Barniol, Nuria
Author_Institution :
Dept. d´Eng. Electron., Univ. Autonoma de Barcelona, Bellaterra, Spain
fYear :
2014
fDate :
2-5 Nov. 2014
Firstpage :
162
Lastpage :
165
Abstract :
A CMOS-NEM tungsten relay based on a 3-T configuration for logic applications is presented. The relay is integrated monolithically in the BEOL of a standard CMOS technology (AMS 0.35 μm) using the tungsten VIA3 layer. The relay is designed and fabricated during the CMOS process and released by a one-step mask-less wet etching. The measured devices show an essentially zero leakage current and a subthreshold slope less than 5 mV/decade with a 104 ratio between on-off current, although they exhibit a high contact resistance (~ 108 Ω). A cycling test was carried out up to 1800 cycles in ambient conditions. Throughout this test, the switch shows great endurance. Finally, the frequency response was also measured.
Keywords :
CMOS integrated circuits; contact resistance; etching; frequency measurement; integrated circuit design; leakage currents; nanoelectromechanical devices; nanofabrication; relays; tungsten; wetting; AMS technology; BEOL; CMOS-NEM tungsten relay; W; back end of line; contact resistance; cycling testing; frequency response measurement; logic application; one-step mask-less wet etching; size 0.35 mum; standard CMOS technology; tungsten VIA3 layer; zero leakage current; CMOS integrated circuits; CMOS technology; Electrodes; Relays; Switches; Tungsten; Voltage measurement; CMOS technology; relays; switches; tungsten;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SENSORS, 2014 IEEE
Conference_Location :
Valencia
Type :
conf
DOI :
10.1109/ICSENS.2014.6984958
Filename :
6984958
Link To Document :
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