A tight flow control for job-shop fabrication lines with finite buffers

Author

Toba, Hiroyasu

Author_Institution

C&C Res. Labs., NEC Corp., Kanagawa, Japan

fYear

1997

fDate

6-8 Oct 1997

Abstract

We propose WIP estimation how control method which serves as a countermeasure against the evaluating timelag problem and the throughput degradation problem with the conventional flow control method (push-pull method). The most important features of this method are: (1) how control based on WIP estimation and scheduling, (2) the breaking down of the entire schedule into individual lot schedules, and (3) greedy lot scheduling for contiguous finite buffers. In actual LCD fabrication line simulation we have confirmed that WIP estimation method is a promising one from the standpoint of line throughput obtained with

Keywords

digital simulation; electronic equipment manufacture; liquid crystal displays; process control; scheduling; LCD TFT panel; LCD fabrication; WIP estimation; contiguous finite buffers; finite buffers; flow control; job-shop fabrication lines; line throughput; scheduling; simulation; throughput degradation; Automatic control; Color; Contamination; Degradation; Fabrication; Laboratories; National electric code; Production equipment; Scheduling; Throughput;

fLanguage

English

Publisher

ieee

Conference_Titel

Semiconductor Manufacturing Conference Proceedings, 1997 IEEE International Symposium on

Conference_Location

San Francisco, CA

Print_ISBN

0-7803-3752-2

Type

conf

DOI

10.1109/ISSM.1997.664532

Filename

664532