DocumentCode :
1895376
Title :
Improved methods for memory module characterization
Author :
Carmona, M. ; Eggers, G. ; Leseduarte, S. ; Legen, A. ; Wolter, A. ; Neugebauer, S. ; Thomas, J.
Author_Institution :
Infineon Technol. AG, Munich, Germany
fYear :
2005
fDate :
18-20 April 2005
Firstpage :
139
Lastpage :
146
Abstract :
An accurate prediction of junction temperatures in memory modules is necessary for an appropriate design of a thermal system solution. For this reason, a thermal analysis of the accuracy of usual techniques for modelling the different components of a memory module is afforded in this paper. A first theoretical analysis of the characteristics and problems of the different components (DRAMs and PCB) is first performed. Regarding DRAMs, a static compact model is extracted from its detailed description by the use of a FEM software. This extraction involves an optimisation procedure of an error function based on a set of boundary conditions. A proposal of a physically-motivated error function is provided. For the PCB, a simplified model is extracted also from a detailed FEM model, but with reduced number of boundary conditions. A measurement setup has been developed with the intention to study the goodness of the developed models. For this reason, two simplified boundary conditions sets were used: simple natural convection and optimised board cooling condition, which could allow us to avoid inaccuracies in the environment conditions when performing the correlation of simulation results. Simulation results have been compared with measurements, providing a good correlation. For a simple natural convection boundary, results are providing a good accuracy for both compact models: the five resistance model and the simple two resistance model. For the optimised board cooling condition, the two resistance model is overestimating the cooling conditions through the PCB thermal connection. Only a disagreement is obtained in the temperature distribution of DRAM case temperature over the module. The reason is thought to be the unequal power distribution over the DRAMs.
Keywords :
DRAM chips; electronic engineering computing; finite element analysis; integrated circuit testing; modules; natural convection; printed circuits; thermal analysis; thermal management (packaging); DRAM case temperature; FEM software; PCB thermal connection; junction temperatures; memory module characterization; optimisation procedure; optimised board cooling condition; physically-motivated error function; power distribution; printed circuit boards; resistance model; simple natural convection; simulation; static compact model; temperature distribution; thermal analysis; Appropriate technology; Boundary conditions; Cooling; Energy consumption; Packaging; Performance analysis; Predictive models; Random access memory; Temperature distribution; Uncertainty;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Thermal, Mechanical and Multi-Physics Simulation and Experiments in Micro-Electronics and Micro-Systems, 2005. EuroSimE 2005. Proceedings of the 6th International Conference on
Print_ISBN :
0-7803-9062-8
Type :
conf
DOI :
10.1109/ESIME.2005.1502789
Filename :
1502789
Link To Document :
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