Title :
Optimization of Well-Type Guard Rings in Epi Cmos
Author :
Chih-Yao Huang ; Ming-Jer Chen
Author_Institution :
Institute of Electronics, National Chiao-Tung University, Taiwan, R.O.C.
Keywords :
CMOS process; Circuit noise; Circuit simulation; Costs; Current measurement; Doping profiles; Epitaxial layers; Semiconductor device modeling; Semiconductor process modeling; Testing;
Conference_Titel :
Semiconductor Modeling & Simulation, 1993. SMS Technical Digest. 1993 Symposium on
Conference_Location :
Taipei, Taiwan
Print_ISBN :
0-7803-1225-2
DOI :
10.1109/SMS.1993.664546