Title :
State-space technique for minimal realisation of analogue circuits and systems
Author :
Kadim, H.J. ; Arslan, T.
Author_Institution :
Dept. of Electron. Eng., Hull Univ., UK
fDate :
31 May-3 Jun 1998
Abstract :
An analogue circuit´s behaviour can be represented by a number of natural modes. To ensure the compliance of the circuit to a prescribed specification, it is important to test the circuit against the performance of its natural modes. Unspecified mode characteristics, which could be due to disturbances in the form of faults (i.e. hard or soft), can indicate abnormality in circuits specified behaviour. The work presented here is twofold: (i) an investigation of system dynamics to estimate the reliability of the circuit when operating in the presence of faults; (ii) a proposed method for minimal realisation
Keywords :
VLSI; analogue integrated circuits; circuit optimisation; fault diagnosis; integrated circuit reliability; state-space methods; VLSI; analogue circuits; hard faults; minimal realisation; natural modes; reliability; soft faults; state-space technique; system dynamics; unspecified mode characteristics; Central Processing Unit; Circuit faults; Circuit simulation; Circuit testing; Circuits and systems; Equations; Fault diagnosis; Redundancy; State-space methods; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-4455-3
DOI :
10.1109/ISCAS.1998.705231
