Title :
Modeling and Simulation of the Standard Cmos Compatible Lateral and Substrate Bjts for Analog Application
Author :
En-Jer Jack Jang
Author_Institution :
Department and Institute of Electronics Engineering, National Chiao-Tung University
Keywords :
Bipolar transistor circuits; CMOS analog integrated circuits; CMOS process; CMOS technology; MOSFETs; Neural networks; Operational amplifiers; SPICE; Semiconductor device modeling; Surface resistance;
Conference_Titel :
Semiconductor Modeling & Simulation, 1993. SMS Technical Digest. 1993 Symposium on
Conference_Location :
Taipei, Taiwan
Print_ISBN :
0-7803-1225-2
DOI :
10.1109/SMS.1993.664549
