Title :
Table of contents
Abstract :
The following topics are dealt with: infrastructure, interconnect and communication; defects, faults and aging; application acceleration; FPGA infrastructure and design environments; FPGA architecture; placement and routing; networking applications; run-time reconfiguration; security applications; biosensing and imaging applications; floating-point arithmetic; fault-tolerance and scrubbing; pattern matching applications; soft processor systems and memory; high-level synthesis and CAD; and arithmetic and computation cores.
Keywords :
ageing; biosensors; field programmable gate arrays; floating point arithmetic; high level synthesis; image processing; pattern matching; CAD; FPGA architecture; FPGA infrastructure; application acceleration; arithmetic core; biosensing application; communication; computation core; defects; design environments; fault scrubbing; fault-tolerance; faults; floating-point arithmetic; high-level synthesis; imaging application; interconnect; networking applications; pattern matching applications; routing; run-time reconfiguration; security applications; soft processor systems;
Conference_Titel :
Field Programmable Logic and Applications (FPL), 2013 23rd International Conference on
Conference_Location :
Porto
DOI :
10.1109/FPL.2013.6645492
