Title : 
Voltage level increment by proposed sub-cell for existing inverter topologies
         
        
            Author : 
Sappati, Santosh Kumar ; Sen, Yogesh Kumar
         
        
            Author_Institution : 
Dept. of Electr. Eng., Nat. Inst. of Technol., Raipur, India
         
        
        
        
        
        
            Abstract : 
This paper proposes and analyses a method that will increase the number of voltage level of any existing topology, only thing is load should be connected across H-bridges. In order to verify the proposed cell, various existing topologies have been simulated and analyzed. The purpose of the circuit proposed is to reduce the use of IGBT switches and hence improving the Total Harmonic Distortion.
         
        
            Keywords : 
harmonic distortion; invertors; network topology; power convertors; IGBT switches; inverter topology; subcell; total harmonic distortion; voltage level increment; Insulated gate bipolar transistors; MATLAB; Switches; Topology; Asymmetric Cascading; Cascaded Inverter; Existing Topologies; IGBT Switch; Multilevel Inverter;
         
        
        
        
            Conference_Titel : 
Electrical, Computer and Communication Technologies (ICECCT), 2015 IEEE International Conference on
         
        
            Conference_Location : 
Coimbatore
         
        
            Print_ISBN : 
978-1-4799-6084-2
         
        
        
            DOI : 
10.1109/ICECCT.2015.7225964