A family of VLSI neural processors for real-time applications

The need for efficient, high-speed realisation of large-scale neural systems has led to the development of a wide variety of custom-designed electronic implementations covering the full range of processor architectures. An ANN system, HyperNet, based on a probabilistic, RAM-based, feed forward architecture and utilising a custom VLSI IC with on-board Reward-Penalty learning has been developed and demonstrated at the University of Hertfordshire. The HyperNet system combines the flexibility and user programmability of commercial neural accelerator boards, with the high speed learning capability of custom neuroprocessor ICs, and includes some of the biological plausibility (and therefore long term potential) of probabilistic RAM and pulse stream networks. The paper analyses the performance of the HyperNet system and describes an evolutionary path capable of meeting the requirements of increasingly complex, large-scale, real-time applications