Unique problems, and possible solutions, in fully depleted SOI CMOS VLSI circuits

The authors use a physical model for the fully depleted SOI (silicon-on-insulator) MOSFET, written into SPICE2 source code, to study floating-body problems in SOI CMOS circuits, and to suggest possible solutions. The model is seminumerical, accounting for all thin-film and short-channel effects, LDD (lightly doped drain) and LDS effects, subthreshold current at both the front and back surfaces, and the impact-ionization current and parasitic BJT (bipolar junction transistor). It is shown that optimally designed LDD and LDS regions can effectively suppress the BJT-induced problems. There is, however, a tradeoff involved because of the voltage drops across these regions and the concomitant reduced drive-current capability of the MOSFET. Also, SOISPICE-2 simulations of ring oscillators comprising SOI CMOS inverters show lengthened propagation delay (lower frequency of oscillation) when the LDD/LDS is used, because of the reduced MOSFET drive as well as the suppressed BJT current