Towards a many-core architecture for HPC

Many-core architectures are a current avenue of research, seeking alternative higher efficiency computing, and HPC is one domain which may benefit most from such a model. While at an initial prototyping stage we present here the design of a MIMD many-core processor, Fynbos and, considering the problems of programmability, an autoparallelising Fortran pipeline. Our initial operating results demonstrate functionality, and the effectiveness of the compiler as the system efficiency increases with problem size in a test case multi-body simulation. The test case also serves to highlight system weaknesses. We conclude that the demonstration offers sufficient motivation for the future work discussed.