• DocumentCode
    1899109
  • Title

    SMI: Slack Measurement Insertion for online timing monitoring in FPGAs

  • Author

    Levine, Joshua M. ; Stott, Edward ; Constantinides, George A. ; Cheung, Peter Y. K.

  • Author_Institution
    Dept. of Electr. & Electron. Eng., Imperial Coll. London, London, UK
  • fYear
    2013
  • fDate
    2-4 Sept. 2013
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    Shadow registers, driven by a variable-phase clock, can be used to extract useful timing information from a circuit during operation. This paper presents Slack Measurement Insertion (SMI), an automated tool flow for inserting shadow registers into an FPGA design to enable measurement of timing slack. The flow provides a parameterised level of circuit coverage and results in minimal timing and area overheads. We demonstrate the process through its application to three complex benchmark designs.
  • Keywords
    field programmable gate arrays; logic design; FPGA design; SMI; automated tool flow; complex benchmark designs; online timing monitoring; parameterised level; shadow registers; slack measurement insertion; timing slack measurement; variable-phase clock; Benchmark testing; Clocks; Delays; Field programmable gate arrays; Monitoring; Registers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field Programmable Logic and Applications (FPL), 2013 23rd International Conference on
  • Conference_Location
    Porto
  • Type

    conf

  • DOI
    10.1109/FPL.2013.6645598
  • Filename
    6645598