Process and design of production-ready equipment for Cu line-pillar/low-k STP interconnect technology

Author

Shishiguchi, Seiichi ; Fukuda, Takuya ; Kochiya, Hiroyuki ; Yanazawa, Hiroshi

Author_Institution

Assoc. of Super-Adv. Electron. Technol., NTT Atsugi R&D Center, Japan

fYear

2002

fDate

2002

Firstpage

36

Lastpage

38

Abstract

Cu line-pillar/low-k STP technology for the fabrication of Cu/low-k interconnects has been developed; and the key equipment, namely a production-ready STP system, has been designed. The technology does not employ CMP, and is based on Cu line/pillar formation in combination with STP (spin coating, film transfer, and hot pressing). Cu lines in L/S patterns as fine as 0.12 μm were successfully fabricated by the line/pillar process and integrated with an organic low-k dielectric (k = 2.9) by STP. The system for the novel STP process, which can handle 200-mm wafers, is described; and the benefits of this process with regard to environmental safety and health are explained.

Keywords

VLSI; copper; hot pressing; integrated circuit interconnections; integrated circuit manufacture; large scale integration; spin coating; 0.12 micron; 200 mm; Cu; Cu line-pillar/low-k STP technology; Cu/low-k interconnects; LSI manufacturing; film transfer; hot pressing; organic low-k dielectric; production-ready equipment; spin coating; Dielectrics; Etching; Fabrication; Health and safety; Heat transfer; Large scale integration; Lithography; Pressing; Process design; Space technology;

fLanguage

English

Publisher

ieee

Conference_Titel

Interconnect Technology Conference, 2002. Proceedings of the IEEE 2002 International

Print_ISBN

0-7803-7216-6

Type

conf

DOI

10.1109/IITC.2002.1014879

Filename

1014879