Title :
Via first dual damascene integration of nanoporous ultra low-k material
Author :
Lin, J.C. ; Lee, H.S. ; Satyanarayana, S. ; Martinez, H. ; Jacobs, T. ; Brennan, K. ; Gonzalez, A. ; Augur, R. ; Shue, S.L. ; Yu, C.H. ; Liang, M.S.
Author_Institution :
Int. Sematech, Austin, TX, USA
Abstract :
In this paper, ISMT reports on the first successful integration of a porous ultra low-k dielectric in a via first/trench last dual damascene structure. The porous dielectric was a spin on siloxane based material with k∼2.2. Cap layer optimization for CMP, resist strip, clean, and electrical results from single and dual damascene integration are discussed.
Keywords :
chemical mechanical polishing; copper; dielectric thin films; integrated circuit interconnections; nanostructured materials; porous materials; sputter etching; CMP; Cu; ash processes optimization; cap layer optimization; damascene Cu structures; dual damascene integration; electrical results; nanoporous ultra low-k material; porous dielectric; resist strip; single damascene integration; spin on siloxane based material; via first/trench last dual damascene structure; Ash; Chemical vapor deposition; Damascene integration; Delamination; Dielectric materials; Nanoporous materials; Plasma measurements; Resists; Semiconductor materials; Silicon carbide;
Conference_Titel :
Interconnect Technology Conference, 2002. Proceedings of the IEEE 2002 International
Print_ISBN :
0-7803-7216-6
DOI :
10.1109/IITC.2002.1014883
