Close-to-hardware error analysis for real-time wavenumber domain processing

The development of efficient hardware architectures for real-time SAR applications demands for an intense analysis of image formation algorithms. Especially the conversion to alternative number representations in terms of efficient hardware ressource allocation is a crucial task. For the error-sensitive Wavenumber Domain Algorithm (ω-k), minimum accuracy boundaries are evaluated. Therefore, this paper introduces an integrated simulation and verification framework which covers the entire development cycle up to the dedicated data path configuration in fixed-point arithmetic. This conversion significantly contributes to an efficent ressource allocation and reduced hardware costs.