A 0.35 μm SiGe BiCMOS 8 GHz Low Noise Broad Band Amplifier

This paper presents a highly integrated LNA operating at 8 GHz using a 0.35 mum SiGe BiCMOS process. In the LNA design, we use folded cascade topology with common emitter degeneration technique for input matching and noise matching. To prevent saturation of the following building blocks, diode bridges are added. To provide enough gain in the RF front-end receiver, three single stage LNAs are cascaded. To overcome the drawback of the low resistive silicon substrate, we suggest a practical method called GSML for low loss and predictable high frequency interconnection lines. More than 20 dB gain is measured in a range of 8.3 GHz to 8.8 GHz. Noise figure is 7.145 dB at 8 GHz, power consumption is 119 mW, 1 dB output power compression point is -8.8 dBm, and input matching is -11.6 dB. The chip 9 size is 1.125 times 0.78 mm²