Field-induced instabilities in polyimide passivated lateral PNP transistors

Stress-induced shifts in the gain of lateral pnp transistors with different dielectric compositions over the base region are discussed. Two separate degradation mechanisms are analyzed. The first and predominant mechanism is the collector fringe-field-induced shift in current gain in the presence of polyimide over the base. The shift is dramatically reduced by covering the base with the emitter metal lead, which acts as a field shield. It is found that an optimized devices, the field shield need not cover the entire base to suppress punch-through and surface inversion. The second mechanism is related to hot-electron injection and trapping under the large two-dimensional field at the collector boundary covered by the field shield. Experimental results are compared with two-dimensional simulations. For the structures analyzed, the hot-electron shifts were negligible when compared to polyimide-induced shifts. Hot carrier effects must be taken into account, however, when scaling and optimizing lateral pnp transistors