Considerations in the design of a boundary scan runtime library

Boundary scan, often called Joint Test Action Group or JTAG, is a technique in which special standardized circuitry is included in an IC to facilitate testing and data transfer. It was standardized in the 1990s as IEEE Standard 1149.1 - 2001 [1]. To meet the standard, an IC must provide a test access port (TAP) for data communication and registers that allow driving and capturing digital signals at the pins or boundary of the IC. The TAP has only four (optionally five) wires, transmits data serially, and is designed so that this serial data transmission can be daisy chained through all of the boundary scan ICs on a board. Thus, all of these ICs can be accessed from a single board-level TAP using only four or five wires.