A high-performance asynchronous SCSI controller

Author

Yun, Kenneth Y. ; Dill, David L.

Author_Institution

Dept. of Electr. & Comput. Eng., California Univ., San Diego, La Jolla, CA, USA

fYear

1995

fDate

2-4 Oct 1995

Firstpage

44

Lastpage

49

Abstract

We describe the design of a high performance asynchronous SCSI (small computer systems interface) controller data path and the associated control circuits. The data path is an asynchronous pipeline and the control circuits for the data path are built out of extended burst-mode machines. This design is functionally compatible with a widely used commercial SCSI controller and was simulated correctly with respect to all of the applicable test vectors used for the commercial design. The technology used for this design is a 0.8 μm CMOS standard cell. The performance is limited by the SCSI specification, not the design itself, and the area is competitive with the commercial design. This design improves the data transfer throughput by up to 2.5 times from previous work by incorporating a FIFO and a distributed control scheme based on extended burst-mode state machines

Keywords

CMOS integrated circuits; distributed control; peripheral interfaces; synchronisation; CMOS standard cell; FIFO; asynchronous pipeline; data transfer throughput; distributed control scheme; extended burst-mode machines; extended burst-mode state machines; high-performance asynchronous SCSI controller; small computer systems interface; CMOS technology; Circuit simulation; Circuit testing; Computational modeling; Computer interfaces; Control systems; Distributed control; High performance computing; Pipelines; Throughput;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer Design: VLSI in Computers and Processors, 1995. ICCD '95. Proceedings., 1995 IEEE International Conference on

Conference_Location

Austin, TX

ISSN

1063-6404

Print_ISBN

0-8186-7165-3

Type

conf

DOI

10.1109/ICCD.1995.528789

Filename

528789