An asynchronous double precision floating point multiplier

Floating point multiplier is a key element in most digital applications such as filters, processors, embedded systems and control units. It is mainly used because of the need for a large dynamic range or in rapid prototyping applications where the actual number range has not been clearly specified. Hence increasing throughput of floating point multiplier is an issue to be taken into account. Asynchronous communication helps in increasing the throughput when the comparison is made with a synchronous system. Also usage of an higher radix multiplier design in the floating point datapath helps in increasing the efficiency of the design. Mantissa computation is the most critical part in floating point multiplication and hence efficient multiplier must be used to compute the same. A higher radix multiplier design is used to form a block in floating point datapath helps in increasing the efficiency of the design. Radix selection of the booth multiplier depends on the chosen IEEE format. For higher precision format there is a requirement for higher radix multiplier. For minimizing the disadvantages of higher radix multiplier design, an high speed adder can be used.