• DocumentCode
    1902181
  • Title

    Rapid single-chip secure processor prototyping on the OpenSPARC FPGA platform

  • Author

    Szefer, Jakub M. ; Zhang, Wei ; Chen, Yu-Yuan ; Champagne, David ; Chan, King ; Li, Will X Y ; Cheung, Ray C C ; Lee, Ruby B.

  • Author_Institution
    Electr. Eng. Dept., Princeton Univ., Princeton, NJ, USA
  • fYear
    2011
  • fDate
    24-27 May 2011
  • Firstpage
    38
  • Lastpage
    44
  • Abstract
    Secure processors have become increasingly important for trustworthy computing as security breaches escalate. By providing hardware-level protection, a secure processor ensures a safe computing environment where confidential data and applications can be protected against both hardware and software attacks. In this paper, we present a single-chip secure processor model and demonstrate rapid prototyping of the secure processor on the OpenSPARC FPGA platform. OpenSPARC T1 is an industry-grade, open-source, FPGA-synthesizable general-purpose microprocessor originally developed by Sun Microsystems, now acquired by Oracle. It is a multi-core, multi-threaded 64-bit processor with open-source hardware, including the microprocessor core, as well as system software that can be freely modified by researchers. We modify the OpenSPARC T1 processor by adding security modules: an AES engine, a TRNG and a memory integrity tree. These enhancements enable security features like memory encryption and memory integrity verification. By prototyping this single-chip secure processor on the FPGA platform, we find that the OpenSPARC T1 FPGA platform has many advantages for secure processor research. Our prototyping demonstrates that additional modules can be added quickly and easily and they add little resource overhead to the base OpenSPARC processor.
  • Keywords
    field programmable gate arrays; hardware-software codesign; microprocessor chips; multi-threading; multiprocessing systems; public domain software; security of data; software prototyping; AES engine; FPGA; OpenSPARC; Oracle; general purpose microprocessor; hardware-level protection; microprocessor core; multi-threaded processor; multicore processor; open source software; open-source hardware; rapid prototyping; single-chip secure processor; trustworthy computing; Clocks; Encryption; Engines; Field programmable gate arrays; Hardware;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Rapid System Prototyping (RSP), 2011 22nd IEEE International Symposium on
  • Conference_Location
    Karlsruhe
  • ISSN
    Pending
  • Print_ISBN
    978-1-4577-0658-5
  • Electronic_ISBN
    Pending
  • Type

    conf

  • DOI
    10.1109/RSP.2011.5929973
  • Filename
    5929973