Design 8-Bit Neural ADC with Exponential Variable Controlling Threshold

For overcoming shortcoming on the local minima and neuron quantity at the hidden layer in which several neural-based analogue-digital convertors (ADCs), a novel 8-bit ADC based on a new algorithm is designed. The new algorithm is similar to successive approximation method, but to attribute parallel algorithm. It adjusts weighting by the exponential alterable threshold. The global circuit is a two-step 8-bit ADC been made up of coarse ADC and fine ADC. In which comparators threshold adjust to use single neuron-MOS achieved. The neuron-MOS as simple DAC is applied to all what is needed in two-step ADC. In the architecture, comparator quantity has a linear relation with the digits of ADC that achieved trade off between speeds and die areas.