Title :
Reconfigurable gate array architectures for real time digital signal processing
Author :
Liersch, Geoff ; Dick, Chris
Author_Institution :
Dept. of Electron. Eng., La Trobe Univ., Bundoora, Vic., Australia
fDate :
31 Oct-2 Nov 1994
Abstract :
The number of usable gates in field programmable gate array (FPGA) logic has recently reached a level which allows their use as computational structures in digital signal processing (DSP) applications. This paper reports on the development of a scalable computing architecture based on Xilinx (CMOS) XC4010 FPGAs for real-time digital signal processing. The architecture requirements for efficient implementation of common DSP algorithms on FPGA platforms are considered. An analysis of the implementation and performance of a high-bandwidth finite impulse response (FIR) filter is presented. A second design using data requantization and spectral shaping to achieve higher order filters is also described
Keywords :
CMOS logic circuits; FIR filters; field programmable gate arrays; quantisation (signal); real-time systems; reconfigurable architectures; signal processing; spectral analysis; CMOS; DSP; DSP algorithms; FIR filter; FPGA platforms; Xilinx XC4010 FPGA; computational structures; data requantization; field programmable gate array; high-bandwidth FIR filter; higher order filters; performance; real time digital signal processing; reconfigurable gate array architectures; scalable computing architecture; spectral shaping; CMOS logic circuits; CMOS process; Computer architecture; Digital signal processing; Field programmable gate arrays; Finite impulse response filter; Logic gates; Programmable logic arrays; Reconfigurable logic; Signal processing algorithms;
Conference_Titel :
Signals, Systems and Computers, 1994. 1994 Conference Record of the Twenty-Eighth Asilomar Conference on
Conference_Location :
Pacific Grove, CA
Print_ISBN :
0-8186-6405-3
DOI :
10.1109/ACSSC.1994.471684
