DocumentCode
1902669
Title
FAST detector on many-core computers
Author
Jego, Bruno ; Robart, Mathieu ; Saha, Kaushik ; Pau, Danilo Pietro
Author_Institution
STMicroelectron.-Adv. Syst. Technol., Grenoble, France
fYear
2012
fDate
3-5 Sept. 2012
Firstpage
263
Lastpage
266
Abstract
Many-core architectures are becoming increasingly popular due to advances in open programming environments. Typical architectures are Graphics Processing Units (GPUs) and Homogenous Computing Fabrics, offering high computing parallelism in order to decrease execution time of computationally intensive algorithms, for example in Computer Vision. In this paper, a low complexity interest point detector has been written in OpenCL language and executed on different desktop and embedded computing platforms. The algorithm performs interest point detection in an image, around which there is enough distinctive information to enable further description. The algorithm has been optimized on the targeted platforms and performance and accuracy comparison has been performed.
Keywords
computational complexity; embedded systems; graphics processing units; multiprocessing systems; parallel architectures; FAST detector; GPU; OpenCL language; computationally intensive algorithms; computer vision; computing parallelism; embedded computing platforms; graphics processing units; homogenous computing fabrics; low complexity interest point detector; many-core architectures; many-core computers; open programming environments; Computer architecture; Detectors; Fabrics; Graphics processing unit; Instruction sets; Kernel; Synchronization;
fLanguage
English
Publisher
ieee
Conference_Titel
Consumer Electronics - Berlin (ICCE-Berlin), 2012 IEEE International Conference on
Conference_Location
Berlin
ISSN
2166-6814
Print_ISBN
978-1-4673-1546-3
Type
conf
DOI
10.1109/ICCE-Berlin.2012.6336453
Filename
6336453
Link To Document