Title :
MRAM-writing circuitry to compensate for thermal-variation of magnetization-reversal current
Author :
Honda, T. ; Sakimura, N. ; Sugibayashi, T. ; Miura, S. ; Numata, H. ; Hada, H. ; Tahara, S.
Author_Institution :
Silicon Syst. Res. Labs., NEC Corp., Kanagawa, Japan
Abstract :
MRAM-writing circuitry to compensate for the thermal variation of the magnetization-reversal current (MRC) is proposed. The writing current of the proposed circuitry is designed to decrease in proportion to an increase in temperature. This technique prevents multiple-write (MW) failures from degrading 1Gb MRAM yield where the standard deviation of MRC variation from other origins is less than 5%.
Keywords :
magnetic film stores; magnetisation reversal; magnetoresistive devices; random-access storage; 1 Gbit; MRAM-writing circuitry; magnetization-reversal current; magnetoresistive RAM; multiple-write failures; thermal variation; writing current; yield; Circuit simulation; Magnetic circuits; Magnetic materials; Magnetic separation; Magnetization; Silicon; Temperature; Voltage; Writing; Yield estimation;
Conference_Titel :
VLSI Circuits Digest of Technical Papers, 2002. Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-7310-3
DOI :
10.1109/VLSIC.2002.1015072
