Title :
Depletion-all-around in SOI G4-FETs: a conduction mechanism with high performance
Author :
Akarvardar, K. ; Cristoloveanu, S. ; Gentil, P. ; Blalock, B.J. ; Dufrene, B. ; Mojarradi, M.M.
Author_Institution :
Inst. of Microelectron., Electromagnetism, & Photonics, ENSERG, Grenoble, France
Abstract :
Only in 4-gate SOI transistors (G4-FETs) can the channel be surrounded by depletion regions induced by independent vertical MOS gates and lateral JFET gates. The majority carriers flow in the film volume, far from interfaces and junctions. We show that inversion layers, formed at the front and back interface, enable the junction gates to have enhanced control on the volume channel. High performance is experimentally demonstrated in terms of transconductance, subthreshold swing and gm/Id ratio. The basic mechanism, which involves a specific 2D gate coupling, is explained with a simple analytical model and simulations.
Keywords :
MOSFET; junction gate field effect transistors; semiconductor device models; silicon-on-insulator; 2D gate coupling mechanism; SOI FET; conduction mechanism; depletion regions; depletion-all-around FET; film volume majority carrier flow; inversion layers; junction gates; lateral JFET gates; quad-gate SOI transistors; subthreshold swing; transconductance; vertical MOS gates; Aerospace electronics; Analytical models; FETs; MOSFETs; Microelectronics; Photonics; Propulsion; Substrates; Threshold voltage; Transconductance;
Conference_Titel :
Solid-State Device Research conference, 2004. ESSDERC 2004. Proceeding of the 34th European
Print_ISBN :
0-7803-8478-4
DOI :
10.1109/ESSDER.2004.1356528
