Title :
A 1-V 2.5-mW 5.2-GHz frequency divider in a 0.35-/spl mu/m CMOS process
Author :
Wong, J.M.C. ; Cheung, V.S.L. ; Luong, Howard C.
Author_Institution :
Dept. of Electr. & Electron. Eng., Hong-Kong Univ. of Sci. & Technol., Kowloon, China
Abstract :
A 1-V high-speed dynamic frequency divider using a common-gate topology is proposed. A simple and accurate small-signal analysis model is provided to estimate the operating frequencies. Implemented in a standard 0.35-/spl mu/m digital CMOS process and at 1-V supply, the proposed frequency divider measures an operating frequency up to 5.2 GHz at a power consumption of 2.5 mW.
Keywords :
CMOS digital integrated circuits; high-speed integrated circuits; integrated circuit modelling; low-power electronics; 0.35 micron; 1 V; 2.5 mW; 5.2 GHz; common-gate topology; digital CMOS process; high-speed dynamic frequency divider; operating frequencies; power consumption; small-signal analysis model; CMOS process; Clocks; Frequency conversion; Frequency estimation; Inverters; MOS devices; MOSFETs; Switches; Topology; Voltage;
Conference_Titel :
VLSI Circuits Digest of Technical Papers, 2002. Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-7310-3
DOI :
10.1109/VLSIC.2002.1015081
