Title :
ESD protection of double-diffusion devices in submicron CMOS processes
Author :
Concannon, Ann ; Vashchenko, V.A. ; Hopper, P. ; Beek, M. Ter
Author_Institution :
Nat. Semicond. Corp., Santa Clara, CA, USA
Abstract :
The device level strategy for ESD protection of "free" double diffusion 12 V and 20 V LDMOS devices, realized in a 3.3 V CMOS process, is presented. The self-protection capabilities and limitations of LDMOS devices have been analyzed, along with complementary snapback TFO and SCR devices, under ESD stress conditions. Optimal device type and parameters have been determined.
Keywords :
electrostatic discharge; power MOSFET; thyristors; 12 V; 20 V; 3.3 V; CMOS process; ESD protection; ESD stress; LDMOS self-protection capabilities; SCR devices; lateral double-diffusion MOS devices; snapback TFO devices; Breakdown voltage; CMOS process; CMOS technology; Circuits; Electrostatic discharge; Pins; Protection; Pulse measurements; Space vector pulse width modulation; Thyristors;
Conference_Titel :
Solid-State Device Research conference, 2004. ESSDERC 2004. Proceeding of the 34th European
Print_ISBN :
0-7803-8478-4
DOI :
10.1109/ESSDER.2004.1356539
