DocumentCode
1903011
Title
Ferroelectric memory based secure dynamically programmable gate array
Author
Masui, S. ; Ninomiya, T. ; Oura, M. ; Yokozeki, W. ; Mukaida, K. ; Kawashima, S.
Author_Institution
Fujitsu Labs. Ltd., Tokyo, Japan
fYear
2002
fDate
13-15 June 2002
Firstpage
200
Lastpage
203
Abstract
A nonvolatile ferroelectric SRAM based 8-context dynamically programmable gate array enables low-cost field programmable systems by the elimination of off-chip nonvolatile memories. Read and program procedures of the associated configuration memory are securely protected, so that unauthorized users cannot gain access to configuration data. The ferroelectric SRAM configuration memory features 2ns nondestructive read operations along with stable data recall. The logic block circuit is optimized to improve available logic gates for multi-context scheme.
Keywords
ferroelectric storage; field programmable gate arrays; logic gates; random-access storage; 2 ns; configuration memory; ferroelectric SRAM; logic block circuit; logic gates; low-cost field programmable systems; multi-context scheme; nondestructive read operations; secure dynamically programmable gate array; stable data recall; Ferroelectric materials; Field programmable gate arrays; Logic arrays; Logic circuits; Logic devices; Logic programming; Nonvolatile memory; Programmable logic arrays; Protection; Random access memory;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits Digest of Technical Papers, 2002. Symposium on
Conference_Location
Honolulu, HI, USA
Print_ISBN
0-7803-7310-3
Type
conf
DOI
10.1109/VLSIC.2002.1015083
Filename
1015083
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