Self-aligned access gate technology for compact embedded flash memories

This paper investigates an approach to solve the access gate misalignment issues linked to the poly-CMP process of compact cells. The process of this self-aligned access gate approach is be detailed and measurements demonstrate the viability of this approach and show that the issues associated with access gate misalignment, such as parameter spread among cells during source side injection programming, are gone. This paves the way for aggressively scaled low power embedded nonvolatile memories for the next CMOS generations.