DocumentCode :
1903185
Title :
Design and validation of the Pentium/sup /spl reg// III and Pentium/sup /spl reg// 4 processors power delivery
Author :
Rahal-Arabi, T. ; Taylor, G. ; Ma, M. ; Webb, C.
fYear :
2002
fDate :
13-15 June 2002
Firstpage :
220
Lastpage :
223
Abstract :
In this paper, we present an empirical approach for the validation of the power supply impedance model. The model is widely used to design the power delivery for high performance systems. For this purpose, several silicon wafers of the Pentium/sup /spl reg// III and Pentium/sup /spl reg// 4 processors were built with various amount of decoupling. The measured data showed significant discrepancies with the model predictions and provided useful insights in investigating the model regions of validity.
Keywords :
integrated circuit design; microprocessor chips; power supply circuits; Pentium 4 processors; Pentium III processors; Si; Si wafers; decoupling; design methodology; empirical validation; model predictions; power delivery design; power supply impedance model; Capacitance; Circuits; Electric resistance; Frequency; Impedance; Inductance; Regulators; Resonance; Silicon; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits Digest of Technical Papers, 2002. Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-7310-3
Type :
conf
DOI :
10.1109/VLSIC.2002.1015090
Filename :
1015090
Link To Document :
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