DocumentCode :
1903380
Title :
A still image encoder based on adaptive resolution vector quantization realizing compression ratio over 1/200 featuring needless calculation elimination architecture
Author :
Fujibayashi, M. ; Nozawa, T. ; Nakayama, T. ; Mochizuki, K. ; Konda, M. ; Kotani, K. ; Sugawa, S. ; Ohmi, T.
Author_Institution :
Dept. of Electron. Eng., Tohoku Univ., Sendai, Japan
fYear :
2002
fDate :
13-15 June 2002
Firstpage :
262
Lastpage :
265
Abstract :
We have developed an advanced vector quantization (VQ) encoding hardware for still image encoding systems. By utilizing needless calculation elimination method, computational cost of VQ encoding is reduced to 40% or less, while maintaining the accuracy of full-search VQ. We have also developed a still image compression algorithm based on adaptive resolution VQ (AR-VQ), which realizes compression ratio over 1/200 while maintaining image quality. We have successfully implemented these two technologies into a still image encoding processor. The processor can compress still image of 1600/spl times/2400 pixels within one second, which is 60 times faster than software implementation on current PCs.
Keywords :
VLSI; adaptive signal processing; data compression; image coding; parallel architectures; vector quantisation; 1600 pixel; 2400 pixel; 3840000 pixel; adaptive resolution vector quantization; compression ratio; computational cost; image compression algorithm; image quality; needless calculation elimination method; still image encoder; Computational efficiency; Degradation; Encoding; Hardware; Image coding; Image quality; Image resolution; Industrial electronics; Pixel; Vector quantization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits Digest of Technical Papers, 2002. Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-7310-3
Type :
conf
DOI :
10.1109/VLSIC.2002.1015099
Filename :
1015099
Link To Document :
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