DocumentCode
1903665
Title
Hierarchical symbolic analysts of large analog circuits with determinant decision diagrams
Author
Tan, Xiangdong ; Shi, C. J Richard
Author_Institution
Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
Volume
6
fYear
1998
fDate
31 May-3 Jun 1998
Firstpage
318
Abstract
A new hierarchical approach is proposed for symbolic analysis of large analog circuits. The key idea is to use a graph-based representation, called determinant decision diagram (DDD). To represent the symbolic determinant and cofactors of the MNA matrix for each subcircuit block. By exploiting the inherent sharing and sparsity of symbolic expressions, DDD is capable of representing a huge number of symbolic product terms in a canonical and highly-compact manner. Further, it enables cofactoring and sensitivity computation to be performed with linear time in the size of DDD. Experimental results have demonstrated that our method outperforms the best-known hierarchical symbolic analyzer SCAPP and even numerical simulator SPICE for small-signal AC analysis
Keywords
analogue circuits; circuit analysis computing; graph theory; network parameters; network topology; sparse matrices; MNA matrix; cofactoring; determinant decision diagrams; graph-based representation; hierarchical symbolic analysis; large analog circuits; small-signal AC analysis; sparsity; subcircuit block; symbolic product terms; Analog circuits; Analytical models; Circuit simulation; Circuit topology; Cities and towns; Computational modeling; Numerical simulation; SPICE; Space exploration; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
Conference_Location
Monterey, CA
Print_ISBN
0-7803-4455-3
Type
conf
DOI
10.1109/ISCAS.1998.705275
Filename
705275
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